DP/EDP码型发生器（Pattern Generator）

DP/eDP Generator信号发生器支持目前的DP2.0/eDP V1.5 的速率，支持多通道测试，DP/EDP码型发生器（Pattern Generator）是业界能够同时支持从物理层至协议层功能性测试的解决方案，支持PSR/PSR2, ALPM, 抖动注入、Skew、电压幅值、时序等相关功能的测试验证。

DP/EDP码型发生器（Pattern Generator）是目前各大主流的SoC，DDIC等厂商用于DP/EDP接口测试验证的方案。

Overview:

The SV5C-eDP Embedded DisplayPort Generator is an ultra-portable, high-performance instrument capable of generating traffic for Embedded DisplayPort and DisplayPort applications at data rates of up to 8.1 Gbps. The SV5C-eDP Generator provides analog parameter controls that enable DisplayPort receiver stress-testing and allow for deep insights into voltage and timing sensitivities of DisplayPort sink devices. The instrument operates with the award-winning Introspect ESP Software environment which includes full pattern synthesis tools for generating test patterns and video frames for system-level test.

Figure 1 below illustrates a typical application of the SV5C-eDP Generator in an Embedded DisplayPort system.

Key Features:

• Protocol: supports Embedded DisplayPort (eDP) up to v1.4 and Display Port (DP) up to v1.4

• Supported Data Rates: up to 8.1 Gbps with a fully continuous range of data rates

• Lane Count: configurable from 1 to 4 lanes per port plus Auxiliary Channel

• Analog Controls: voltage amplitude and common mode voltage, each per lane

• Signal Impairments: jitter injection, sinusoidal voltage noise injection, per-wire timing skew

• Pattern Generation: full video frame generation with 2 GBytes of pattern memory